kcb_a8_v1.elf:     file format elf32-avr

Sections:
Idx Name          Size      VMA       LMA       File off  Algn
  0 .text         000008de  00000000  00000000  00000074  2**1
                  CONTENTS, ALLOC, LOAD, READONLY, CODE
  1 .bss          00000040  00800100  000008de  00000952  2**0
                  ALLOC
  2 .stab         0000183c  00000000  00000000  00000954  2**2
                  CONTENTS, READONLY, DEBUGGING
  3 .stabstr      00000f0b  00000000  00000000  00002190  2**0
                  CONTENTS, READONLY, DEBUGGING
Disassembly of section .text:

00000000 <__vectors>:
   0:	19 c0       	rjmp	.+50     	; 0x34 <__CCP__>
   2:	33 c0       	rjmp	.+102    	; 0x6a <__bad_interrupt>
   4:	32 c0       	rjmp	.+100    	; 0x6a <__bad_interrupt>
   6:	31 c0       	rjmp	.+98     	; 0x6a <__bad_interrupt>
   8:	30 c0       	rjmp	.+96     	; 0x6a <__bad_interrupt>
   a:	2f c0       	rjmp	.+94     	; 0x6a <__bad_interrupt>
   c:	2e c0       	rjmp	.+92     	; 0x6a <__bad_interrupt>
   e:	db c1       	rjmp	.+950    	; 0x3c6 <__vector_7>
  10:	2c c0       	rjmp	.+88     	; 0x6a <__bad_interrupt>
  12:	2b c0       	rjmp	.+86     	; 0x6a <__bad_interrupt>
  14:	b9 c0       	rjmp	.+370    	; 0x188 <__vector_10>
  16:	29 c0       	rjmp	.+82     	; 0x6a <__bad_interrupt>
  18:	28 c0       	rjmp	.+80     	; 0x6a <__bad_interrupt>
  1a:	27 c0       	rjmp	.+78     	; 0x6a <__bad_interrupt>
  1c:	26 c0       	rjmp	.+76     	; 0x6a <__bad_interrupt>
  1e:	25 c0       	rjmp	.+74     	; 0x6a <__bad_interrupt>
  20:	24 c0       	rjmp	.+72     	; 0x6a <__bad_interrupt>
  22:	23 c0       	rjmp	.+70     	; 0x6a <__bad_interrupt>
  24:	22 c0       	rjmp	.+68     	; 0x6a <__bad_interrupt>
  26:	21 c0       	rjmp	.+66     	; 0x6a <__bad_interrupt>
  28:	20 c0       	rjmp	.+64     	; 0x6a <__bad_interrupt>
  2a:	1f c0       	rjmp	.+62     	; 0x6a <__bad_interrupt>
  2c:	1e c0       	rjmp	.+60     	; 0x6a <__bad_interrupt>
  2e:	1d c0       	rjmp	.+58     	; 0x6a <__bad_interrupt>
  30:	63 c3       	rjmp	.+1734   	; 0x6f8 <__vector_24>
  32:	1b c0       	rjmp	.+54     	; 0x6a <__bad_interrupt>

00000034 <__ctors_end>:
  34:	11 24       	eor	r1, r1
  36:	1f be       	out	0x3f, r1	; 63
  38:	cf ef       	ldi	r28, 0xFF	; 255
  3a:	d4 e0       	ldi	r29, 0x04	; 4
  3c:	de bf       	out	0x3e, r29	; 62
  3e:	cd bf       	out	0x3d, r28	; 61

00000040 <__do_copy_data>:
  40:	11 e0       	ldi	r17, 0x01	; 1
  42:	a0 e0       	ldi	r26, 0x00	; 0
  44:	b1 e0       	ldi	r27, 0x01	; 1
  46:	ee ed       	ldi	r30, 0xDE	; 222
  48:	f8 e0       	ldi	r31, 0x08	; 8
  4a:	02 c0       	rjmp	.+4      	; 0x50 <.do_copy_data_start>

0000004c <.do_copy_data_loop>:
  4c:	05 90       	lpm	r0, Z+
  4e:	0d 92       	st	X+, r0

00000050 <.do_copy_data_start>:
  50:	a0 30       	cpi	r26, 0x00	; 0
  52:	b1 07       	cpc	r27, r17
  54:	d9 f7       	brne	.-10     	; 0x4c <.do_copy_data_loop>

00000056 <__do_clear_bss>:
  56:	11 e0       	ldi	r17, 0x01	; 1
  58:	a0 e0       	ldi	r26, 0x00	; 0
  5a:	b1 e0       	ldi	r27, 0x01	; 1
  5c:	01 c0       	rjmp	.+2      	; 0x60 <.do_clear_bss_start>

0000005e <.do_clear_bss_loop>:
  5e:	1d 92       	st	X+, r1

00000060 <.do_clear_bss_start>:
  60:	a0 34       	cpi	r26, 0x40	; 64
  62:	b1 07       	cpc	r27, r17
  64:	e1 f7       	brne	.-8      	; 0x5e <.do_clear_bss_loop>
  66:	21 d0       	rcall	.+66     	; 0xaa <main>
  68:	38 c4       	rjmp	.+2160   	; 0x8da <_exit>

0000006a <__bad_interrupt>:
  6a:	00 c0       	rjmp	.+0      	; 0x6c <__vector_default>

0000006c <__vector_default>:
#include "timers.h"
#include "sleep.h"
#include "i2c_slave.h"

ISR(BADISR_vect)
{
  6c:	1f 92       	push	r1
  6e:	0f 92       	push	r0
  70:	0f b6       	in	r0, 0x3f	; 63
  72:	0f 92       	push	r0
  74:	11 24       	eor	r1, r1
}
  76:	0f 90       	pop	r0
  78:	0f be       	out	0x3f, r0	; 63
  7a:	0f 90       	pop	r0
  7c:	1f 90       	pop	r1
  7e:	18 95       	reti

00000080 <set_output.1659>:
#include <string.h>

#include "pin_ctl.h"
#include "timers.h"
#include "sleep.h"
#include "i2c_slave.h"
  80:	80 ff       	sbrs	r24, 0
  82:	02 c0       	rjmp	.+4      	; 0x88 <set_output.1659+0x8>

  84:	5c 9a       	sbi	0x0b, 4	; 11
  86:	01 c0       	rjmp	.+2      	; 0x8a <set_output.1659+0xa>
ISR(BADISR_vect)
{
  88:	5c 98       	cbi	0x0b, 4	; 11
}

int main(void)
  8a:	81 ff       	sbrs	r24, 1
  8c:	02 c0       	rjmp	.+4      	; 0x92 <set_output.1659+0x12>
{
  8e:	43 9a       	sbi	0x08, 3	; 8
  90:	01 c0       	rjmp	.+2      	; 0x94 <set_output.1659+0x14>
	PORTB = (1<<0)|(1<<1)|(1<<2);
	PORTC = 0;
  92:	43 98       	cbi	0x08, 3	; 8
	PORTD = (1<<2)|(1<<3);
	DDRB = 0;
	DDRC = (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5);
  94:	82 ff       	sbrs	r24, 2
  96:	02 c0       	rjmp	.+4      	; 0x9c <set_output.1659+0x1c>
	DDRD = (1<<0) | (1<<1) | (1<<4) | (1<<5) | (1<<6) | (1<<7);
  98:	58 9a       	sbi	0x0b, 0	; 11
  9a:	01 c0       	rjmp	.+2      	; 0x9e <set_output.1659+0x1e>

	set_leds(0);
  9c:	58 98       	cbi	0x0b, 0	; 11
	set_output(0);

	timer_setup();
  9e:	83 ff       	sbrs	r24, 3
  a0:	02 c0       	rjmp	.+4      	; 0xa6 <set_output.1659+0x26>
	i2c_slave_setup(102);
  a2:	59 9a       	sbi	0x0b, 1	; 11
  a4:	08 95       	ret
	sei();

  a6:	59 98       	cbi	0x0b, 1	; 11
  a8:	08 95       	ret

000000aa <main>:
{
}

int main(void)
{
	PORTB = (1<<0)|(1<<1)|(1<<2);
  aa:	87 e0       	ldi	r24, 0x07	; 7
  ac:	85 b9       	out	0x05, r24	; 5
	PORTC = 0;
  ae:	18 b8       	out	0x08, r1	; 8
	PORTD = (1<<2)|(1<<3);
  b0:	8c e0       	ldi	r24, 0x0C	; 12
  b2:	8b b9       	out	0x0b, r24	; 11
	DDRB = 0;
  b4:	14 b8       	out	0x04, r1	; 4
	DDRC = (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5);
  b6:	8f e3       	ldi	r24, 0x3F	; 63
  b8:	87 b9       	out	0x07, r24	; 7
	DDRD = (1<<0) | (1<<1) | (1<<4) | (1<<5) | (1<<6) | (1<<7);
  ba:	83 ef       	ldi	r24, 0xF3	; 243
  bc:	8a b9       	out	0x0a, r24	; 10
#include <avr/pgmspace.h>
#include <stdlib.h>
#include <math.h>

#include <stdarg.h>
#include <ctype.h>
  be:	8b b1       	in	r24, 0x0b	; 11
  c0:	8f 71       	andi	r24, 0x1F	; 31
  c2:	8b b9       	out	0x0b, r24	; 11
#include <string.h>
  c4:	8b b1       	in	r24, 0x0b	; 11
  c6:	80 6e       	ori	r24, 0xE0	; 224
  c8:	8b b9       	out	0x0b, r24	; 11
	DDRB = 0;
	DDRC = (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5);
	DDRD = (1<<0) | (1<<1) | (1<<4) | (1<<5) | (1<<6) | (1<<7);

	set_leds(0);
	set_output(0);
  ca:	80 e0       	ldi	r24, 0x00	; 0
  cc:	d9 df       	rcall	.-78     	; 0x80 <set_output.1659>
#include "sleep.h"
#include "i2c_slave.h"

ISR(BADISR_vect)
{
}
  ce:	10 92 80 00 	sts	0x0080, r1

  d2:	80 e5       	ldi	r24, 0x50	; 80
  d4:	93 ec       	ldi	r25, 0xC3	; 195
  d6:	90 93 87 00 	sts	0x0087, r25
  da:	80 93 86 00 	sts	0x0086, r24
int main(void)
{
  de:	84 e1       	ldi	r24, 0x14	; 20
  e0:	80 93 b3 00 	sts	0x00B3, r24
	PORTB = (1<<0)|(1<<1)|(1<<2);
	PORTC = 0;
  e4:	92 e0       	ldi	r25, 0x02	; 2
  e6:	90 93 b0 00 	sts	0x00B0, r25
	PORTD = (1<<2)|(1<<3);
  ea:	90 93 b1 00 	sts	0x00B1, r25
	DDRB = 0;
  ee:	10 92 80 00 	sts	0x0080, r1
	DDRC = (1<<0) | (1<<1) | (1<<2) | (1<<3) | (1<<4) | (1<<5);
  f2:	89 e1       	ldi	r24, 0x19	; 25
  f4:	80 93 81 00 	sts	0x0081, r24
	DDRD = (1<<0) | (1<<1) | (1<<4) | (1<<5) | (1<<6) | (1<<7);

  f8:	90 93 70 00 	sts	0x0070, r25
	set_leds(0);
  fc:	80 e2       	ldi	r24, 0x20	; 32
  fe:	80 93 6f 00 	sts	0x006F, r24
volatile uint8_t i2cptr;
volatile uint8_t i2coutbuf[10];

void i2c_slave_setup(uint8_t address)
{
	TWAR = (address & 0x7f) << 1;
 102:	8c ec       	ldi	r24, 0xCC	; 204
 104:	80 93 ba 00 	sts	0x00BA, r24
	TWCR = (1<<TWEN) | (1<<TWIE) | (1<<TWEA);
 108:	85 e4       	ldi	r24, 0x45	; 69
 10a:	80 93 bc 00 	sts	0x00BC, r24

void get_device_lock(uint8_t which)
{
	uint8_t acquired = 0;
	do {
		cli();
 10e:	f8 94       	cli
		if((device_locks & which) == 0) {
 110:	80 91 00 01 	lds	r24, 0x0100
 114:	82 ff       	sbrs	r24, 2
 116:	02 c0       	rjmp	.+4      	; 0x11c <main+0x72>
 118:	80 e0       	ldi	r24, 0x00	; 0
 11a:	06 c0       	rjmp	.+12     	; 0x128 <main+0x7e>
			device_locks |= which;
 11c:	80 91 00 01 	lds	r24, 0x0100
 120:	84 60       	ori	r24, 0x04	; 4
 122:	80 93 00 01 	sts	0x0100, r24
 126:	81 e0       	ldi	r24, 0x01	; 1
			acquired = 1;
		}
		sei();
 128:	78 94       	sei
	} while(acquired == 0);
 12a:	88 23       	and	r24, r24
 12c:	81 f3       	breq	.-32     	; 0x10e <main+0x64>
	set_output(0);

	timer_setup();
	i2c_slave_setup(102);
	sei();
 12e:	78 94       	sei

	while(1) {
		i2coutbuf[0] = 'A';
 130:	21 e4       	ldi	r18, 0x41	; 65
 132:	20 93 07 01 	sts	0x0107, r18
		*((uint16_t*)(i2coutbuf+1)) = ins[0];
 136:	80 91 01 01 	lds	r24, 0x0101
 13a:	90 91 02 01 	lds	r25, 0x0102
 13e:	90 93 09 01 	sts	0x0109, r25
 142:	80 93 08 01 	sts	0x0108, r24
		*((uint16_t*)(i2coutbuf+3)) = ins[1];
 146:	80 91 03 01 	lds	r24, 0x0103
 14a:	90 91 04 01 	lds	r25, 0x0104
 14e:	90 93 0b 01 	sts	0x010B, r25
 152:	80 93 0a 01 	sts	0x010A, r24
		*((uint16_t*)(i2coutbuf+5)) = ins[2];
 156:	80 91 05 01 	lds	r24, 0x0105
 15a:	90 91 06 01 	lds	r25, 0x0106
 15e:	90 93 0d 01 	sts	0x010D, r25
 162:	80 93 0c 01 	sts	0x010C, r24
		i2coutbuf[7] = 0;
 166:	10 92 0e 01 	sts	0x010E, r1

		if(!(PIND & (1<<2))) i2coutbuf[7] |= (1<<0);
 16a:	4a 99       	sbic	0x09, 2	; 9
 16c:	05 c0       	rjmp	.+10     	; 0x178 <main+0xce>
 16e:	80 91 0e 01 	lds	r24, 0x010E
 172:	81 60       	ori	r24, 0x01	; 1
 174:	80 93 0e 01 	sts	0x010E, r24
		if(!(PIND & (1<<3))) i2coutbuf[7] |= (1<<1);
 178:	4b 99       	sbic	0x09, 3	; 9
 17a:	db cf       	rjmp	.-74     	; 0x132 <main+0x88>
 17c:	80 91 0e 01 	lds	r24, 0x010E
 180:	82 60       	ori	r24, 0x02	; 2
 182:	80 93 0e 01 	sts	0x010E, r24
 186:	d5 cf       	rjmp	.-86     	; 0x132 <main+0x88>

00000188 <__vector_10>:
	i2c_slave_setup(102);
	sei();

	while(1) {
		i2coutbuf[0] = 'A';
		*((uint16_t*)(i2coutbuf+1)) = ins[0];
 188:	1f 92       	push	r1
 18a:	0f 92       	push	r0
 18c:	0f b6       	in	r0, 0x3f	; 63
 18e:	0f 92       	push	r0
 190:	11 24       	eor	r1, r1
 192:	ef 92       	push	r14
 194:	ff 92       	push	r15
 196:	0f 93       	push	r16
 198:	1f 93       	push	r17
 19a:	2f 93       	push	r18
 19c:	3f 93       	push	r19
 19e:	4f 93       	push	r20
 1a0:	5f 93       	push	r21
 1a2:	6f 93       	push	r22
 1a4:	8f 93       	push	r24
 1a6:	9f 93       	push	r25
 1a8:	af 93       	push	r26
 1aa:	bf 93       	push	r27
		*((uint16_t*)(i2coutbuf+3)) = ins[1];
 1ac:	80 91 23 01 	lds	r24, 0x0123
 1b0:	90 91 24 01 	lds	r25, 0x0124
 1b4:	a0 91 25 01 	lds	r26, 0x0125
 1b8:	b0 91 26 01 	lds	r27, 0x0126
 1bc:	80 5b       	subi	r24, 0xB0	; 176
 1be:	9c 43       	sbci	r25, 0x3C	; 60
 1c0:	af 4f       	sbci	r26, 0xFF	; 255
 1c2:	bf 4f       	sbci	r27, 0xFF	; 255
 1c4:	80 93 23 01 	sts	0x0123, r24
 1c8:	90 93 24 01 	sts	0x0124, r25
 1cc:	a0 93 25 01 	sts	0x0125, r26
 1d0:	b0 93 26 01 	sts	0x0126, r27
		*((uint16_t*)(i2coutbuf+5)) = ins[2];
 1d4:	80 91 23 01 	lds	r24, 0x0123
 1d8:	90 91 24 01 	lds	r25, 0x0124
 1dc:	a0 91 25 01 	lds	r26, 0x0125
 1e0:	b0 91 26 01 	lds	r27, 0x0126
 1e4:	80 50       	subi	r24, 0x00	; 0
 1e6:	98 42       	sbci	r25, 0x28	; 40
 1e8:	ab 46       	sbci	r26, 0x6B	; 107
 1ea:	be 4e       	sbci	r27, 0xEE	; 238
 1ec:	40 f0       	brcs	.+16     	; 0x1fe <__vector_10+0x76>
 1ee:	10 92 23 01 	sts	0x0123, r1
 1f2:	10 92 24 01 	sts	0x0124, r1
 1f6:	10 92 25 01 	sts	0x0125, r1
 1fa:	10 92 26 01 	sts	0x0126, r1
		i2coutbuf[7] = 0;

 1fe:	80 91 27 01 	lds	r24, 0x0127
 202:	88 30       	cpi	r24, 0x08	; 8
 204:	09 f0       	breq	.+2      	; 0x208 <__vector_10+0x80>
 206:	c8 c0       	rjmp	.+400    	; 0x398 <__vector_10+0x210>
 208:	20 91 23 01 	lds	r18, 0x0123
 20c:	30 91 24 01 	lds	r19, 0x0124
 210:	40 91 25 01 	lds	r20, 0x0125
 214:	50 91 26 01 	lds	r21, 0x0126
 218:	80 91 84 00 	lds	r24, 0x0084
 21c:	90 91 85 00 	lds	r25, 0x0085
 220:	a0 e0       	ldi	r26, 0x00	; 0
 222:	b0 e0       	ldi	r27, 0x00	; 0
 224:	82 0f       	add	r24, r18
 226:	93 1f       	adc	r25, r19
 228:	a4 1f       	adc	r26, r20
 22a:	b5 1f       	adc	r27, r21
		*((uint16_t*)(i2coutbuf+3)) = ins[1];
		*((uint16_t*)(i2coutbuf+5)) = ins[2];
		i2coutbuf[7] = 0;

		if(!(PIND & (1<<2))) i2coutbuf[7] |= (1<<0);
		if(!(PIND & (1<<3))) i2coutbuf[7] |= (1<<1);
 22c:	10 92 27 01 	sts	0x0127, r1

 230:	20 91 17 01 	lds	r18, 0x0117
 234:	30 91 18 01 	lds	r19, 0x0118
 238:	40 91 19 01 	lds	r20, 0x0119
 23c:	50 91 1a 01 	lds	r21, 0x011A
 240:	82 17       	cp	r24, r18
 242:	93 07       	cpc	r25, r19
 244:	a4 07       	cpc	r26, r20
 246:	b5 07       	cpc	r27, r21
 248:	48 f0       	brcs	.+18     	; 0x25c <__vector_10+0xd4>
 24a:	7c 01       	movw	r14, r24
 24c:	8d 01       	movw	r16, r26
 24e:	e2 1a       	sub	r14, r18
 250:	f3 0a       	sbc	r15, r19
 252:	04 0b       	sbc	r16, r20
 254:	15 0b       	sbc	r17, r21
 256:	a8 01       	movw	r20, r16
 258:	97 01       	movw	r18, r14
 25a:	0c c0       	rjmp	.+24     	; 0x274 <__vector_10+0xec>
 25c:	7c 01       	movw	r14, r24
 25e:	8d 01       	movw	r16, r26
 260:	e2 1a       	sub	r14, r18
 262:	f3 0a       	sbc	r15, r19
 264:	04 0b       	sbc	r16, r20
 266:	15 0b       	sbc	r17, r21
 268:	a8 01       	movw	r20, r16
 26a:	97 01       	movw	r18, r14
 26c:	20 50       	subi	r18, 0x00	; 0
 26e:	38 4d       	sbci	r19, 0xD8	; 216
 270:	44 49       	sbci	r20, 0x94	; 148
 272:	51 41       	sbci	r21, 0x11	; 17
		*((uint16_t*)(i2coutbuf+5)) = ins[2];
		i2coutbuf[7] = 0;

		if(!(PIND & (1<<2))) i2coutbuf[7] |= (1<<0);
		if(!(PIND & (1<<3))) i2coutbuf[7] |= (1<<1);

 274:	21 54       	subi	r18, 0x41	; 65
 276:	32 44       	sbci	r19, 0x42	; 66
 278:	4f 40       	sbci	r20, 0x0F	; 15
 27a:	50 40       	sbci	r21, 0x00	; 0
 27c:	60 f0       	brcs	.+24     	; 0x296 <__vector_10+0x10e>
//		idle_sleep();
 27e:	10 92 02 01 	sts	0x0102, r1
 282:	10 92 01 01 	sts	0x0101, r1
	}
 286:	80 93 17 01 	sts	0x0117, r24
 28a:	90 93 18 01 	sts	0x0118, r25
 28e:	a0 93 19 01 	sts	0x0119, r26
 292:	b0 93 1a 01 	sts	0x011A, r27
}

 296:	20 91 1b 01 	lds	r18, 0x011B
 29a:	30 91 1c 01 	lds	r19, 0x011C
 29e:	40 91 1d 01 	lds	r20, 0x011D
 2a2:	50 91 1e 01 	lds	r21, 0x011E
 2a6:	82 17       	cp	r24, r18
 2a8:	93 07       	cpc	r25, r19
 2aa:	a4 07       	cpc	r26, r20
 2ac:	b5 07       	cpc	r27, r21
 2ae:	48 f0       	brcs	.+18     	; 0x2c2 <__vector_10+0x13a>
 2b0:	7c 01       	movw	r14, r24
 2b2:	8d 01       	movw	r16, r26
 2b4:	e2 1a       	sub	r14, r18
 2b6:	f3 0a       	sbc	r15, r19
 2b8:	04 0b       	sbc	r16, r20
 2ba:	15 0b       	sbc	r17, r21
 2bc:	a8 01       	movw	r20, r16
 2be:	97 01       	movw	r18, r14
 2c0:	0c c0       	rjmp	.+24     	; 0x2da <__vector_10+0x152>
 2c2:	7c 01       	movw	r14, r24
 2c4:	8d 01       	movw	r16, r26
 2c6:	e2 1a       	sub	r14, r18
 2c8:	f3 0a       	sbc	r15, r19
 2ca:	04 0b       	sbc	r16, r20
 2cc:	15 0b       	sbc	r17, r21
 2ce:	a8 01       	movw	r20, r16
 2d0:	97 01       	movw	r18, r14
 2d2:	20 50       	subi	r18, 0x00	; 0
 2d4:	38 4d       	sbci	r19, 0xD8	; 216
 2d6:	44 49       	sbci	r20, 0x94	; 148
 2d8:	51 41       	sbci	r21, 0x11	; 17
		if(!(PIND & (1<<3))) i2coutbuf[7] |= (1<<1);

//		idle_sleep();
	}
}

 2da:	21 54       	subi	r18, 0x41	; 65
 2dc:	32 44       	sbci	r19, 0x42	; 66
 2de:	4f 40       	sbci	r20, 0x0F	; 15
 2e0:	50 40       	sbci	r21, 0x00	; 0
 2e2:	60 f0       	brcs	.+24     	; 0x2fc <__vector_10+0x174>
 2e4:	10 92 04 01 	sts	0x0104, r1
 2e8:	10 92 03 01 	sts	0x0103, r1
 2ec:	80 93 1b 01 	sts	0x011B, r24
 2f0:	90 93 1c 01 	sts	0x011C, r25
 2f4:	a0 93 1d 01 	sts	0x011D, r26
 2f8:	b0 93 1e 01 	sts	0x011E, r27
 2fc:	20 91 1f 01 	lds	r18, 0x011F
 300:	30 91 20 01 	lds	r19, 0x0120
 304:	40 91 21 01 	lds	r20, 0x0121
 308:	50 91 22 01 	lds	r21, 0x0122
 30c:	82 17       	cp	r24, r18
 30e:	93 07       	cpc	r25, r19
 310:	a4 07       	cpc	r26, r20
 312:	b5 07       	cpc	r27, r21
 314:	48 f0       	brcs	.+18     	; 0x328 <__vector_10+0x1a0>
 316:	7c 01       	movw	r14, r24
 318:	8d 01       	movw	r16, r26
 31a:	e2 1a       	sub	r14, r18
 31c:	f3 0a       	sbc	r15, r19
 31e:	04 0b       	sbc	r16, r20
 320:	15 0b       	sbc	r17, r21
 322:	a8 01       	movw	r20, r16
 324:	97 01       	movw	r18, r14
 326:	0c c0       	rjmp	.+24     	; 0x340 <__vector_10+0x1b8>
 328:	7c 01       	movw	r14, r24
 32a:	8d 01       	movw	r16, r26
 32c:	e2 1a       	sub	r14, r18
 32e:	f3 0a       	sbc	r15, r19
 330:	04 0b       	sbc	r16, r20
 332:	15 0b       	sbc	r17, r21
 334:	a8 01       	movw	r20, r16
 336:	97 01       	movw	r18, r14
 338:	20 50       	subi	r18, 0x00	; 0
 33a:	38 4d       	sbci	r19, 0xD8	; 216
 33c:	44 49       	sbci	r20, 0x94	; 148
 33e:	51 41       	sbci	r21, 0x11	; 17
}

 340:	21 54       	subi	r18, 0x41	; 65
 342:	32 44       	sbci	r19, 0x42	; 66
 344:	4f 40       	sbci	r20, 0x0F	; 15
 346:	50 40       	sbci	r21, 0x00	; 0
 348:	60 f0       	brcs	.+24     	; 0x362 <__vector_10+0x1da>
 34a:	10 92 06 01 	sts	0x0106, r1
 34e:	10 92 05 01 	sts	0x0105, r1
 352:	80 93 1f 01 	sts	0x011F, r24
 356:	90 93 20 01 	sts	0x0120, r25
 35a:	a0 93 21 01 	sts	0x0121, r26
 35e:	b0 93 22 01 	sts	0x0122, r27
 362:	80 91 11 01 	lds	r24, 0x0111
 366:	90 91 12 01 	lds	r25, 0x0112
 36a:	89 2b       	or	r24, r25
 36c:	11 f4       	brne	.+4      	; 0x372 <__vector_10+0x1ea>
 36e:	40 98       	cbi	0x08, 0	; 8
 370:	01 c0       	rjmp	.+2      	; 0x374 <__vector_10+0x1ec>
 372:	40 9a       	sbi	0x08, 0	; 8
 374:	80 91 13 01 	lds	r24, 0x0113
 378:	90 91 14 01 	lds	r25, 0x0114
 37c:	89 2b       	or	r24, r25
 37e:	11 f4       	brne	.+4      	; 0x384 <__vector_10+0x1fc>
 380:	41 98       	cbi	0x08, 1	; 8
 382:	01 c0       	rjmp	.+2      	; 0x386 <__vector_10+0x1fe>
 384:	41 9a       	sbi	0x08, 1	; 8
 386:	80 91 15 01 	lds	r24, 0x0115
 38a:	90 91 16 01 	lds	r25, 0x0116
 38e:	89 2b       	or	r24, r25
 390:	11 f4       	brne	.+4      	; 0x396 <__vector_10+0x20e>
 392:	42 98       	cbi	0x08, 2	; 8
 394:	01 c0       	rjmp	.+2      	; 0x398 <__vector_10+0x210>
 396:	42 9a       	sbi	0x08, 2	; 8
 398:	80 91 27 01 	lds	r24, 0x0127
 39c:	8f 5f       	subi	r24, 0xFF	; 255
 39e:	80 93 27 01 	sts	0x0127, r24
 3a2:	bf 91       	pop	r27
 3a4:	af 91       	pop	r26
 3a6:	9f 91       	pop	r25
 3a8:	8f 91       	pop	r24
 3aa:	6f 91       	pop	r22
 3ac:	5f 91       	pop	r21
 3ae:	4f 91       	pop	r20
 3b0:	3f 91       	pop	r19
 3b2:	2f 91       	pop	r18
 3b4:	1f 91       	pop	r17
 3b6:	0f 91       	pop	r16
 3b8:	ff 90       	pop	r15
 3ba:	ef 90       	pop	r14
 3bc:	0f 90       	pop	r0
 3be:	0f be       	out	0x3f, r0	; 63
 3c0:	0f 90       	pop	r0
 3c2:	1f 90       	pop	r1
 3c4:	18 95       	reti

000003c6 <__vector_7>:
 3c6:	1f 92       	push	r1
 3c8:	0f 92       	push	r0
 3ca:	0f b6       	in	r0, 0x3f	; 63
 3cc:	0f 92       	push	r0
 3ce:	11 24       	eor	r1, r1
 3d0:	ef 92       	push	r14
 3d2:	ff 92       	push	r15
 3d4:	0f 93       	push	r16
 3d6:	1f 93       	push	r17
 3d8:	2f 93       	push	r18
 3da:	3f 93       	push	r19
 3dc:	4f 93       	push	r20
 3de:	5f 93       	push	r21
 3e0:	6f 93       	push	r22
 3e2:	7f 93       	push	r23
 3e4:	8f 93       	push	r24
 3e6:	9f 93       	push	r25
 3e8:	af 93       	push	r26
 3ea:	bf 93       	push	r27
 3ec:	ef 93       	push	r30
 3ee:	e3 b1       	in	r30, 0x03	; 3
 3f0:	e7 70       	andi	r30, 0x07	; 7
 3f2:	80 91 28 01 	lds	r24, 0x0128
 3f6:	e8 17       	cp	r30, r24
 3f8:	09 f4       	brne	.+2      	; 0x3fc <__vector_7+0x36>
 3fa:	4c c1       	rjmp	.+664    	; 0x694 <__stack+0x195>
 3fc:	6e 2f       	mov	r22, r30
 3fe:	70 e0       	ldi	r23, 0x00	; 0
 400:	80 91 28 01 	lds	r24, 0x0128
 404:	90 e0       	ldi	r25, 0x00	; 0
 406:	86 27       	eor	r24, r22
 408:	97 27       	eor	r25, r23
 40a:	80 ff       	sbrs	r24, 0
 40c:	67 c0       	rjmp	.+206    	; 0x4dc <__vector_7+0x116>
 40e:	e0 fd       	sbrc	r30, 0
 410:	1b c0       	rjmp	.+54     	; 0x448 <__vector_7+0x82>
 412:	20 91 23 01 	lds	r18, 0x0123
 416:	30 91 24 01 	lds	r19, 0x0124
 41a:	40 91 25 01 	lds	r20, 0x0125
 41e:	50 91 26 01 	lds	r21, 0x0126
 422:	80 91 84 00 	lds	r24, 0x0084
 426:	90 91 85 00 	lds	r25, 0x0085
 42a:	a0 e0       	ldi	r26, 0x00	; 0
 42c:	b0 e0       	ldi	r27, 0x00	; 0
 42e:	82 0f       	add	r24, r18
 430:	93 1f       	adc	r25, r19
 432:	a4 1f       	adc	r26, r20
 434:	b5 1f       	adc	r27, r21
 436:	80 93 29 01 	sts	0x0129, r24
 43a:	90 93 2a 01 	sts	0x012A, r25
 43e:	a0 93 2b 01 	sts	0x012B, r26
 442:	b0 93 2c 01 	sts	0x012C, r27
 446:	4a c0       	rjmp	.+148    	; 0x4dc <__vector_7+0x116>
 448:	e0 90 29 01 	lds	r14, 0x0129
 44c:	f0 90 2a 01 	lds	r15, 0x012A
 450:	00 91 2b 01 	lds	r16, 0x012B
 454:	10 91 2c 01 	lds	r17, 0x012C
 458:	20 91 23 01 	lds	r18, 0x0123
 45c:	30 91 24 01 	lds	r19, 0x0124
 460:	40 91 25 01 	lds	r20, 0x0125
 464:	50 91 26 01 	lds	r21, 0x0126
 468:	80 91 84 00 	lds	r24, 0x0084
 46c:	90 91 85 00 	lds	r25, 0x0085
 470:	a0 e0       	ldi	r26, 0x00	; 0
 472:	b0 e0       	ldi	r27, 0x00	; 0
 474:	82 0f       	add	r24, r18
 476:	93 1f       	adc	r25, r19
 478:	a4 1f       	adc	r26, r20
 47a:	b5 1f       	adc	r27, r21
 47c:	8e 15       	cp	r24, r14
 47e:	9f 05       	cpc	r25, r15
 480:	a0 07       	cpc	r26, r16
 482:	b1 07       	cpc	r27, r17
 484:	28 f0       	brcs	.+10     	; 0x490 <__vector_7+0xca>
 486:	8e 19       	sub	r24, r14
 488:	9f 09       	sbc	r25, r15
 48a:	a0 0b       	sbc	r26, r16
 48c:	b1 0b       	sbc	r27, r17
 48e:	08 c0       	rjmp	.+16     	; 0x4a0 <__vector_7+0xda>
 490:	8e 19       	sub	r24, r14
 492:	9f 09       	sbc	r25, r15
 494:	a0 0b       	sbc	r26, r16
 496:	b1 0b       	sbc	r27, r17
 498:	80 50       	subi	r24, 0x00	; 0
 49a:	98 4d       	sbci	r25, 0xD8	; 216
 49c:	a4 49       	sbci	r26, 0x94	; 148
 49e:	b1 41       	sbci	r27, 0x11	; 17
 4a0:	90 93 02 01 	sts	0x0102, r25
 4a4:	80 93 01 01 	sts	0x0101, r24
 4a8:	20 91 23 01 	lds	r18, 0x0123
 4ac:	30 91 24 01 	lds	r19, 0x0124
 4b0:	40 91 25 01 	lds	r20, 0x0125
 4b4:	50 91 26 01 	lds	r21, 0x0126
 4b8:	80 91 84 00 	lds	r24, 0x0084
 4bc:	90 91 85 00 	lds	r25, 0x0085
 4c0:	a0 e0       	ldi	r26, 0x00	; 0
 4c2:	b0 e0       	ldi	r27, 0x00	; 0
 4c4:	82 0f       	add	r24, r18
 4c6:	93 1f       	adc	r25, r19
 4c8:	a4 1f       	adc	r26, r20
 4ca:	b5 1f       	adc	r27, r21
 4cc:	80 93 17 01 	sts	0x0117, r24
 4d0:	90 93 18 01 	sts	0x0118, r25
 4d4:	a0 93 19 01 	sts	0x0119, r26
 4d8:	b0 93 1a 01 	sts	0x011A, r27
 4dc:	80 91 28 01 	lds	r24, 0x0128
 4e0:	90 e0       	ldi	r25, 0x00	; 0
 4e2:	86 27       	eor	r24, r22
 4e4:	97 27       	eor	r25, r23
 4e6:	81 ff       	sbrs	r24, 1
 4e8:	67 c0       	rjmp	.+206    	; 0x5b8 <__stack+0xb9>
 4ea:	61 fd       	sbrc	r22, 1
 4ec:	1b c0       	rjmp	.+54     	; 0x524 <__stack+0x25>
 4ee:	20 91 23 01 	lds	r18, 0x0123
 4f2:	30 91 24 01 	lds	r19, 0x0124
 4f6:	40 91 25 01 	lds	r20, 0x0125
 4fa:	50 91 26 01 	lds	r21, 0x0126
 4fe:	80 91 84 00 	lds	r24, 0x0084
 502:	90 91 85 00 	lds	r25, 0x0085
 506:	a0 e0       	ldi	r26, 0x00	; 0
 508:	b0 e0       	ldi	r27, 0x00	; 0
 50a:	82 0f       	add	r24, r18
 50c:	93 1f       	adc	r25, r19
 50e:	a4 1f       	adc	r26, r20
 510:	b5 1f       	adc	r27, r21
 512:	80 93 2d 01 	sts	0x012D, r24
 516:	90 93 2e 01 	sts	0x012E, r25
 51a:	a0 93 2f 01 	sts	0x012F, r26
 51e:	b0 93 30 01 	sts	0x0130, r27
 522:	4a c0       	rjmp	.+148    	; 0x5b8 <__stack+0xb9>
 524:	e0 90 2d 01 	lds	r14, 0x012D
 528:	f0 90 2e 01 	lds	r15, 0x012E
 52c:	00 91 2f 01 	lds	r16, 0x012F
 530:	10 91 30 01 	lds	r17, 0x0130
 534:	20 91 23 01 	lds	r18, 0x0123
 538:	30 91 24 01 	lds	r19, 0x0124
 53c:	40 91 25 01 	lds	r20, 0x0125
 540:	50 91 26 01 	lds	r21, 0x0126
 544:	80 91 84 00 	lds	r24, 0x0084
 548:	90 91 85 00 	lds	r25, 0x0085
 54c:	a0 e0       	ldi	r26, 0x00	; 0
 54e:	b0 e0       	ldi	r27, 0x00	; 0
 550:	82 0f       	add	r24, r18
 552:	93 1f       	adc	r25, r19
 554:	a4 1f       	adc	r26, r20
 556:	b5 1f       	adc	r27, r21
 558:	8e 15       	cp	r24, r14
 55a:	9f 05       	cpc	r25, r15
 55c:	a0 07       	cpc	r26, r16
 55e:	b1 07       	cpc	r27, r17
 560:	28 f0       	brcs	.+10     	; 0x56c <__stack+0x6d>
 562:	8e 19       	sub	r24, r14
 564:	9f 09       	sbc	r25, r15
 566:	a0 0b       	sbc	r26, r16
 568:	b1 0b       	sbc	r27, r17
 56a:	08 c0       	rjmp	.+16     	; 0x57c <__stack+0x7d>
 56c:	8e 19       	sub	r24, r14
 56e:	9f 09       	sbc	r25, r15
 570:	a0 0b       	sbc	r26, r16
 572:	b1 0b       	sbc	r27, r17
 574:	80 50       	subi	r24, 0x00	; 0
 576:	98 4d       	sbci	r25, 0xD8	; 216
 578:	a4 49       	sbci	r26, 0x94	; 148
 57a:	b1 41       	sbci	r27, 0x11	; 17
 57c:	90 93 04 01 	sts	0x0104, r25
 580:	80 93 03 01 	sts	0x0103, r24
 584:	20 91 23 01 	lds	r18, 0x0123
 588:	30 91 24 01 	lds	r19, 0x0124
 58c:	40 91 25 01 	lds	r20, 0x0125
 590:	50 91 26 01 	lds	r21, 0x0126
 594:	80 91 84 00 	lds	r24, 0x0084
 598:	90 91 85 00 	lds	r25, 0x0085
 59c:	a0 e0       	ldi	r26, 0x00	; 0
 59e:	b0 e0       	ldi	r27, 0x00	; 0
 5a0:	82 0f       	add	r24, r18
 5a2:	93 1f       	adc	r25, r19
 5a4:	a4 1f       	adc	r26, r20
 5a6:	b5 1f       	adc	r27, r21
 5a8:	80 93 1b 01 	sts	0x011B, r24
 5ac:	90 93 1c 01 	sts	0x011C, r25
 5b0:	a0 93 1d 01 	sts	0x011D, r26
 5b4:	b0 93 1e 01 	sts	0x011E, r27
 5b8:	80 91 28 01 	lds	r24, 0x0128
 5bc:	90 e0       	ldi	r25, 0x00	; 0
 5be:	86 27       	eor	r24, r22
 5c0:	97 27       	eor	r25, r23
 5c2:	82 ff       	sbrs	r24, 2
 5c4:	67 c0       	rjmp	.+206    	; 0x694 <__stack+0x195>
 5c6:	62 fd       	sbrc	r22, 2
 5c8:	1b c0       	rjmp	.+54     	; 0x600 <__stack+0x101>
 5ca:	20 91 23 01 	lds	r18, 0x0123
 5ce:	30 91 24 01 	lds	r19, 0x0124
 5d2:	40 91 25 01 	lds	r20, 0x0125
 5d6:	50 91 26 01 	lds	r21, 0x0126
 5da:	80 91 84 00 	lds	r24, 0x0084
 5de:	90 91 85 00 	lds	r25, 0x0085
 5e2:	a0 e0       	ldi	r26, 0x00	; 0
 5e4:	b0 e0       	ldi	r27, 0x00	; 0
 5e6:	82 0f       	add	r24, r18
 5e8:	93 1f       	adc	r25, r19
 5ea:	a4 1f       	adc	r26, r20
 5ec:	b5 1f       	adc	r27, r21
 5ee:	80 93 31 01 	sts	0x0131, r24
 5f2:	90 93 32 01 	sts	0x0132, r25
 5f6:	a0 93 33 01 	sts	0x0133, r26
 5fa:	b0 93 34 01 	sts	0x0134, r27
 5fe:	4a c0       	rjmp	.+148    	; 0x694 <__stack+0x195>
 600:	e0 90 31 01 	lds	r14, 0x0131
 604:	f0 90 32 01 	lds	r15, 0x0132
 608:	00 91 33 01 	lds	r16, 0x0133
 60c:	10 91 34 01 	lds	r17, 0x0134
 610:	20 91 23 01 	lds	r18, 0x0123
 614:	30 91 24 01 	lds	r19, 0x0124
 618:	40 91 25 01 	lds	r20, 0x0125
 61c:	50 91 26 01 	lds	r21, 0x0126
 620:	80 91 84 00 	lds	r24, 0x0084
 624:	90 91 85 00 	lds	r25, 0x0085
 628:	a0 e0       	ldi	r26, 0x00	; 0
 62a:	b0 e0       	ldi	r27, 0x00	; 0
 62c:	82 0f       	add	r24, r18
 62e:	93 1f       	adc	r25, r19
 630:	a4 1f       	adc	r26, r20
 632:	b5 1f       	adc	r27, r21
 634:	8e 15       	cp	r24, r14
 636:	9f 05       	cpc	r25, r15
 638:	a0 07       	cpc	r26, r16
 63a:	b1 07       	cpc	r27, r17
 63c:	28 f0       	brcs	.+10     	; 0x648 <__stack+0x149>
 63e:	8e 19       	sub	r24, r14
 640:	9f 09       	sbc	r25, r15
 642:	a0 0b       	sbc	r26, r16
 644:	b1 0b       	sbc	r27, r17
 646:	08 c0       	rjmp	.+16     	; 0x658 <__stack+0x159>
 648:	8e 19       	sub	r24, r14
 64a:	9f 09       	sbc	r25, r15
 64c:	a0 0b       	sbc	r26, r16
 64e:	b1 0b       	sbc	r27, r17
 650:	80 50       	subi	r24, 0x00	; 0
 652:	98 4d       	sbci	r25, 0xD8	; 216
 654:	a4 49       	sbci	r26, 0x94	; 148
 656:	b1 41       	sbci	r27, 0x11	; 17
 658:	90 93 06 01 	sts	0x0106, r25
 65c:	80 93 05 01 	sts	0x0105, r24
 660:	20 91 23 01 	lds	r18, 0x0123
 664:	30 91 24 01 	lds	r19, 0x0124
 668:	40 91 25 01 	lds	r20, 0x0125
 66c:	50 91 26 01 	lds	r21, 0x0126
 670:	80 91 84 00 	lds	r24, 0x0084
 674:	90 91 85 00 	lds	r25, 0x0085
 678:	a0 e0       	ldi	r26, 0x00	; 0
 67a:	b0 e0       	ldi	r27, 0x00	; 0
 67c:	82 0f       	add	r24, r18
 67e:	93 1f       	adc	r25, r19
 680:	a4 1f       	adc	r26, r20
 682:	b5 1f       	adc	r27, r21
 684:	80 93 1f 01 	sts	0x011F, r24
 688:	90 93 20 01 	sts	0x0120, r25
 68c:	a0 93 21 01 	sts	0x0121, r26
 690:	b0 93 22 01 	sts	0x0122, r27
 694:	20 91 84 00 	lds	r18, 0x0084
 698:	30 91 85 00 	lds	r19, 0x0085
 69c:	80 91 11 01 	lds	r24, 0x0111
 6a0:	90 91 12 01 	lds	r25, 0x0112
 6a4:	82 17       	cp	r24, r18
 6a6:	93 07       	cpc	r25, r19
 6a8:	08 f4       	brcc	.+2      	; 0x6ac <__stack+0x1ad>
 6aa:	40 98       	cbi	0x08, 0	; 8
 6ac:	80 91 13 01 	lds	r24, 0x0113
 6b0:	90 91 14 01 	lds	r25, 0x0114
 6b4:	82 17       	cp	r24, r18
 6b6:	93 07       	cpc	r25, r19
 6b8:	08 f4       	brcc	.+2      	; 0x6bc <__stack+0x1bd>
 6ba:	41 98       	cbi	0x08, 1	; 8
 6bc:	80 91 15 01 	lds	r24, 0x0115
 6c0:	90 91 16 01 	lds	r25, 0x0116
 6c4:	82 17       	cp	r24, r18
 6c6:	93 07       	cpc	r25, r19
 6c8:	08 f4       	brcc	.+2      	; 0x6cc <__stack+0x1cd>
 6ca:	42 98       	cbi	0x08, 2	; 8
 6cc:	e0 93 28 01 	sts	0x0128, r30
 6d0:	ef 91       	pop	r30
 6d2:	bf 91       	pop	r27
 6d4:	af 91       	pop	r26
 6d6:	9f 91       	pop	r25
 6d8:	8f 91       	pop	r24
 6da:	7f 91       	pop	r23
 6dc:	6f 91       	pop	r22
 6de:	5f 91       	pop	r21
 6e0:	4f 91       	pop	r20
 6e2:	3f 91       	pop	r19
 6e4:	2f 91       	pop	r18
 6e6:	1f 91       	pop	r17
 6e8:	0f 91       	pop	r16
 6ea:	ff 90       	pop	r15
 6ec:	ef 90       	pop	r14
 6ee:	0f 90       	pop	r0
 6f0:	0f be       	out	0x3f, r0	; 63
 6f2:	0f 90       	pop	r0
 6f4:	1f 90       	pop	r1
 6f6:	18 95       	reti

000006f8 <__vector_24>:
	get_device_lock(DEVICE_LOCK_TWI);
}

ISR(TWI_vect)
{
 6f8:	1f 92       	push	r1
 6fa:	0f 92       	push	r0
 6fc:	0f b6       	in	r0, 0x3f	; 63
 6fe:	0f 92       	push	r0
 700:	11 24       	eor	r1, r1
 702:	2f 93       	push	r18
 704:	3f 93       	push	r19
 706:	4f 93       	push	r20
 708:	5f 93       	push	r21
 70a:	6f 93       	push	r22
 70c:	7f 93       	push	r23
 70e:	8f 93       	push	r24
 710:	9f 93       	push	r25
 712:	af 93       	push	r26
 714:	bf 93       	push	r27
 716:	ef 93       	push	r30
 718:	ff 93       	push	r31
	uint8_t sr = TWSR & 0xf8;
 71a:	80 91 b9 00 	lds	r24, 0x00B9

	switch(sr) {
 71e:	88 7f       	andi	r24, 0xF8	; 248
 720:	80 39       	cpi	r24, 0x90	; 144
 722:	09 f4       	brne	.+2      	; 0x726 <__vector_24+0x2e>
 724:	4c c0       	rjmp	.+152    	; 0x7be <__vector_24+0xc6>
 726:	81 39       	cpi	r24, 0x91	; 145
 728:	a0 f4       	brcc	.+40     	; 0x752 <__vector_24+0x5a>
 72a:	80 37       	cpi	r24, 0x70	; 112
 72c:	09 f4       	brne	.+2      	; 0x730 <__vector_24+0x38>
 72e:	3f c0       	rjmp	.+126    	; 0x7ae <__vector_24+0xb6>
 730:	81 37       	cpi	r24, 0x71	; 113
 732:	30 f4       	brcc	.+12     	; 0x740 <__vector_24+0x48>
 734:	80 36       	cpi	r24, 0x60	; 96
 736:	d9 f1       	breq	.+118    	; 0x7ae <__vector_24+0xb6>
 738:	88 36       	cpi	r24, 0x68	; 104
 73a:	09 f0       	breq	.+2      	; 0x73e <__vector_24+0x46>
 73c:	b8 c0       	rjmp	.+368    	; 0x8ae <__vector_24+0x1b6>
 73e:	37 c0       	rjmp	.+110    	; 0x7ae <__vector_24+0xb6>
 740:	80 38       	cpi	r24, 0x80	; 128
 742:	e9 f1       	breq	.+122    	; 0x7be <__vector_24+0xc6>
 744:	88 38       	cpi	r24, 0x88	; 136
 746:	09 f4       	brne	.+2      	; 0x74a <__vector_24+0x52>
 748:	57 c0       	rjmp	.+174    	; 0x7f8 <__vector_24+0x100>
 74a:	88 37       	cpi	r24, 0x78	; 120
 74c:	09 f0       	breq	.+2      	; 0x750 <__vector_24+0x58>
 74e:	af c0       	rjmp	.+350    	; 0x8ae <__vector_24+0x1b6>
 750:	2e c0       	rjmp	.+92     	; 0x7ae <__vector_24+0xb6>
 752:	80 3b       	cpi	r24, 0xB0	; 176
 754:	99 f0       	breq	.+38     	; 0x77c <__vector_24+0x84>
 756:	81 3b       	cpi	r24, 0xB1	; 177
 758:	48 f4       	brcc	.+18     	; 0x76c <__vector_24+0x74>
 75a:	80 3a       	cpi	r24, 0xA0	; 160
 75c:	09 f4       	brne	.+2      	; 0x760 <__vector_24+0x68>
 75e:	a3 c0       	rjmp	.+326    	; 0x8a6 <__vector_24+0x1ae>
 760:	88 3a       	cpi	r24, 0xA8	; 168
 762:	61 f0       	breq	.+24     	; 0x77c <__vector_24+0x84>
 764:	88 39       	cpi	r24, 0x98	; 152
 766:	09 f0       	breq	.+2      	; 0x76a <__vector_24+0x72>
 768:	a2 c0       	rjmp	.+324    	; 0x8ae <__vector_24+0x1b6>
 76a:	46 c0       	rjmp	.+140    	; 0x7f8 <__vector_24+0x100>
 76c:	80 3c       	cpi	r24, 0xC0	; 192
 76e:	c9 f0       	breq	.+50     	; 0x7a2 <__vector_24+0xaa>
 770:	88 3c       	cpi	r24, 0xC8	; 200
 772:	b9 f0       	breq	.+46     	; 0x7a2 <__vector_24+0xaa>
 774:	88 3b       	cpi	r24, 0xB8	; 184
 776:	09 f0       	breq	.+2      	; 0x77a <__vector_24+0x82>
 778:	9a c0       	rjmp	.+308    	; 0x8ae <__vector_24+0x1b6>
 77a:	02 c0       	rjmp	.+4      	; 0x780 <__vector_24+0x88>
	// slave TX modes
	case 0xa8: // slave tx, got my address, load udr
	case 0xb0:
		i2cptr = 0;
 77c:	10 92 3f 01 	sts	0x013F, r1
	case 0xb8:
		TWDR = i2coutbuf[i2cptr++];
 780:	90 91 3f 01 	lds	r25, 0x013F
 784:	e9 2f       	mov	r30, r25
 786:	f0 e0       	ldi	r31, 0x00	; 0
 788:	e9 5f       	subi	r30, 0xF9	; 249
 78a:	fe 4f       	sbci	r31, 0xFE	; 254
 78c:	80 81       	ld	r24, Z
 78e:	80 93 bb 00 	sts	0x00BB, r24
 792:	9f 5f       	subi	r25, 0xFF	; 255
 794:	90 93 3f 01 	sts	0x013F, r25
		if(i2cptr == 9) {
 798:	80 91 3f 01 	lds	r24, 0x013F
 79c:	89 30       	cpi	r24, 0x09	; 9
 79e:	41 f5       	brne	.+80     	; 0x7f0 <__vector_24+0xf8>
 7a0:	1e c0       	rjmp	.+60     	; 0x7de <__vector_24+0xe6>
			TWCR |= (1<<TWEA) | (1<<TWINT);
		}
		break;
	case 0xc0:
	case 0xc8: // slave tx end
		TWCR &= ~((1<<TWSTA) | (1<<TWSTO));
 7a2:	80 91 bc 00 	lds	r24, 0x00BC
 7a6:	8f 7c       	andi	r24, 0xCF	; 207
 7a8:	80 93 bc 00 	sts	0x00BC, r24
 7ac:	21 c0       	rjmp	.+66     	; 0x7f0 <__vector_24+0xf8>
	// slave RX modes
	case 0x60:
	case 0x68:
	case 0x70:
	case 0x78:
		TWCR |= (1<<TWEA) | (1<<TWINT);
 7ae:	80 91 bc 00 	lds	r24, 0x00BC
 7b2:	80 6c       	ori	r24, 0xC0	; 192
 7b4:	80 93 bc 00 	sts	0x00BC, r24
		i2cptr = 0;
 7b8:	10 92 3f 01 	sts	0x013F, r1
 7bc:	7d c0       	rjmp	.+250    	; 0x8b8 <__vector_24+0x1c0>
		break;
	case 0x80:
	case 0x90:
		i2cbuf[i2cptr++] = TWDR;
 7be:	80 91 3f 01 	lds	r24, 0x013F
 7c2:	e8 2f       	mov	r30, r24
 7c4:	f0 e0       	ldi	r31, 0x00	; 0
 7c6:	90 91 bb 00 	lds	r25, 0x00BB
 7ca:	eb 5c       	subi	r30, 0xCB	; 203
 7cc:	fe 4f       	sbci	r31, 0xFE	; 254
 7ce:	90 83       	st	Z, r25
 7d0:	8f 5f       	subi	r24, 0xFF	; 255
 7d2:	80 93 3f 01 	sts	0x013F, r24
		if(i2cptr == 7) {
 7d6:	80 91 3f 01 	lds	r24, 0x013F
 7da:	87 30       	cpi	r24, 0x07	; 7
 7dc:	49 f4       	brne	.+18     	; 0x7f0 <__vector_24+0xf8>
			TWCR &= ~(1<<TWEA);
 7de:	80 91 bc 00 	lds	r24, 0x00BC
 7e2:	8f 7b       	andi	r24, 0xBF	; 191
 7e4:	80 93 bc 00 	sts	0x00BC, r24
			TWCR |= (1<<TWINT);
 7e8:	80 91 bc 00 	lds	r24, 0x00BC
 7ec:	80 68       	ori	r24, 0x80	; 128
 7ee:	62 c0       	rjmp	.+196    	; 0x8b4 <__vector_24+0x1bc>
		} else {
			TWCR |= (1<<TWEA) | (1<<TWINT);
 7f0:	80 91 bc 00 	lds	r24, 0x00BC
 7f4:	80 6c       	ori	r24, 0xC0	; 192
 7f6:	5e c0       	rjmp	.+188    	; 0x8b4 <__vector_24+0x1bc>
		}
		break;
	case 0x88:
	case 0x98:
		i2cbuf[i2cptr] = TWDR;
 7f8:	e0 91 3f 01 	lds	r30, 0x013F
 7fc:	f0 e0       	ldi	r31, 0x00	; 0
 7fe:	80 91 bb 00 	lds	r24, 0x00BB
 802:	eb 5c       	subi	r30, 0xCB	; 203
 804:	fe 4f       	sbci	r31, 0xFE	; 254
 806:	80 83       	st	Z, r24
		TWCR |= (1<<TWEA) | (1<<TWINT);
 808:	80 91 bc 00 	lds	r24, 0x00BC
 80c:	80 6c       	ori	r24, 0xC0	; 192
 80e:	80 93 bc 00 	sts	0x00BC, r24
		// finished RX
		if(i2cbuf[0] == 'C') {
 812:	80 91 35 01 	lds	r24, 0x0135
 816:	83 34       	cpi	r24, 0x43	; 67
 818:	09 f0       	breq	.+2      	; 0x81c <__vector_24+0x124>
 81a:	4e c0       	rjmp	.+156    	; 0x8b8 <__vector_24+0x1c0>
			set_leds(i2cbuf[7]);
 81c:	90 91 3c 01 	lds	r25, 0x013C
#include <inttypes.h>
#include <avr/io.h>
#include <avr/interrupt.h>
#include <avr/pgmspace.h>
#include <stdlib.h>
#include <math.h>
 820:	90 95       	com	r25

#include <stdarg.h>
#include <ctype.h>
 822:	8b b1       	in	r24, 0x0b	; 11
 824:	8f 71       	andi	r24, 0x1F	; 31
 826:	8b b9       	out	0x0b, r24	; 11
#include <string.h>
 828:	8b b1       	in	r24, 0x0b	; 11
 82a:	92 95       	swap	r25
 82c:	99 0f       	add	r25, r25
 82e:	90 7e       	andi	r25, 0xE0	; 224
 830:	98 2b       	or	r25, r24
 832:	9b b9       	out	0x0b, r25	; 11
			set_output(i2cbuf[7] >> 3);
 834:	80 91 3c 01 	lds	r24, 0x013C
 838:	86 95       	lsr	r24
 83a:	86 95       	lsr	r24
 83c:	86 95       	lsr	r24
 83e:	20 dc       	rcall	.-1984   	; 0x80 <set_output.1659>

#include "pin_ctl.h"
#include "timers.h"
 840:	80 91 36 01 	lds	r24, 0x0136
 844:	90 91 37 01 	lds	r25, 0x0137
 848:	24 e1       	ldi	r18, 0x14	; 20
 84a:	30 e0       	ldi	r19, 0x00	; 0
 84c:	ac 01       	movw	r20, r24
 84e:	42 9f       	mul	r20, r18
 850:	c0 01       	movw	r24, r0
 852:	43 9f       	mul	r20, r19
 854:	90 0d       	add	r25, r0
 856:	52 9f       	mul	r21, r18
 858:	90 0d       	add	r25, r0
 85a:	11 24       	eor	r1, r1
 85c:	90 93 12 01 	sts	0x0112, r25
 860:	80 93 11 01 	sts	0x0111, r24
#include "sleep.h"
 864:	80 91 38 01 	lds	r24, 0x0138
 868:	90 91 39 01 	lds	r25, 0x0139
 86c:	ac 01       	movw	r20, r24
 86e:	42 9f       	mul	r20, r18
 870:	c0 01       	movw	r24, r0
 872:	43 9f       	mul	r20, r19
 874:	90 0d       	add	r25, r0
 876:	52 9f       	mul	r21, r18
 878:	90 0d       	add	r25, r0
 87a:	11 24       	eor	r1, r1
 87c:	90 93 14 01 	sts	0x0114, r25
 880:	80 93 13 01 	sts	0x0113, r24
#include "i2c_slave.h"
 884:	80 91 3a 01 	lds	r24, 0x013A
 888:	90 91 3b 01 	lds	r25, 0x013B
 88c:	ac 01       	movw	r20, r24
 88e:	42 9f       	mul	r20, r18
 890:	c0 01       	movw	r24, r0
 892:	43 9f       	mul	r20, r19
 894:	90 0d       	add	r25, r0
 896:	52 9f       	mul	r21, r18
 898:	90 0d       	add	r25, r0
 89a:	11 24       	eor	r1, r1
 89c:	90 93 16 01 	sts	0x0116, r25
 8a0:	80 93 15 01 	sts	0x0115, r24
 8a4:	09 c0       	rjmp	.+18     	; 0x8b8 <__vector_24+0x1c0>
			set_sv1(*((uint16_t *)(i2cbuf+3)));
			set_sv2(*((uint16_t *)(i2cbuf+5)));
		}
		break;
	case 0xA0: // repeated start / stop
		TWCR |= (1<<TWINT) | (1<<TWEN);
 8a6:	80 91 bc 00 	lds	r24, 0x00BC
 8aa:	84 68       	ori	r24, 0x84	; 132
 8ac:	03 c0       	rjmp	.+6      	; 0x8b4 <__vector_24+0x1bc>
		break;
	default:
		TWCR = 0;
 8ae:	10 92 bc 00 	sts	0x00BC, r1
		TWCR = (1<<TWEN) | (1<<TWIE) | (1<<TWEA) | (1<<TWINT);
 8b2:	85 ec       	ldi	r24, 0xC5	; 197
 8b4:	80 93 bc 00 	sts	0x00BC, r24
	}
}
 8b8:	ff 91       	pop	r31
 8ba:	ef 91       	pop	r30
 8bc:	bf 91       	pop	r27
 8be:	af 91       	pop	r26
 8c0:	9f 91       	pop	r25
 8c2:	8f 91       	pop	r24
 8c4:	7f 91       	pop	r23
 8c6:	6f 91       	pop	r22
 8c8:	5f 91       	pop	r21
 8ca:	4f 91       	pop	r20
 8cc:	3f 91       	pop	r19
 8ce:	2f 91       	pop	r18
 8d0:	0f 90       	pop	r0
 8d2:	0f be       	out	0x3f, r0	; 63
 8d4:	0f 90       	pop	r0
 8d6:	1f 90       	pop	r1
 8d8:	18 95       	reti

000008da <_exit>:
 8da:	f8 94       	cli

000008dc <__stop_program>:
 8dc:	ff cf       	rjmp	.-2      	; 0x8dc <__stop_program>